DocumentCode
1673974
Title
Design of a (127,99) four error correcting BCH codec
Author
Blazek, Z. ; Little, W.D. ; Bhargava, V.K.
Author_Institution
Dept. of Electr. & Comput. Eng., Victoria Univ., BC, Canada
fYear
1988
Firstpage
94
Lastpage
100
Abstract
The design of a codec based on the (127,99) four-error-correcting BCH code is described. This code was chosen as a compromise between overall performance and implementation complexity for a frequency-hopped spread-spectrum system operating under worst-case partial band noise jamming and worst-case multitone jamming. The codec is designed for implementation with application-specific integrated circuits. The approach has a short implementation cycle, requires a very small number of integrated circuit chips, and yields a codec that can operate up to about 5 Mb/s
Keywords
codecs; error correction codes; frequency agility; jamming; spread spectrum communication; 5 Mbit/s; application-specific integrated circuits; four error correcting BCH codec; frequency-hopped spread-spectrum system; worst-case multitone jamming; worst-case partial band noise jamming; Application specific integrated circuits; Codecs; Computer errors; Decoding; Error correction codes; Frequency; Hardware; Jamming; Polynomials; Spread spectrum communication;
fLanguage
English
Publisher
ieee
Conference_Titel
WESCANEX 88: 'Digital Communications Conference Proceedings'
Conference_Location
Saskatoon, Sask.
Type
conf
DOI
10.1109/WESCAN.1988.27674
Filename
27674
Link To Document