Title :
1.1 to 1.6GHz distributed differential oscillator global clock network
Author :
Chan, Steven C. ; Shepard, Kenneth L. ; Restle, Phillip J.
Author_Institution :
Columbia Univ., New York, NY, USA
Abstract :
A distributed differential oscillator global clock network using on-chip spiral inductors is designed in a 0.18 μm 1.8V CMOS technology. The 2mm×2mm resonant clock network has a tank Q of 4.3, achieves more than an order of magnitude less jitter than a conventional non-resonant tree-driven-grid global clock network, and uses almost three times less power.
Keywords :
CMOS digital integrated circuits; clocks; inductors; oscillators; power consumption; timing jitter; 0.18 micron; 1.1 to 1.6 GHz; CMOS technology; distributed differential oscillator; global clock network; jitter; on-chip spiral inductors; power consumption; resonant clock network; Capacitance; Clocks; Drives; Frequency; Inductors; Jitter; Noise reduction; Oscillators; Resonance; Spirals;
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-8904-2
DOI :
10.1109/ISSCC.2005.1494097
