An innovative open-loop CDR based on injection-locked oscillator for high-speed data link applications

Author

Begueret, J.B. ; Deval, Y. ; Scarabello, C. ; Le Gall, J.-Y. ; Pignol, M.

Author_Institution

IXL Lab., Univ. of Bordeaux, France

fYear

2003

Firstpage

313

Lastpage

316

Abstract

A new fully integrated clock and data recovery (CDR) architecture based on an injection-locked oscillator is presented in this paper. Two circuits, implemented in CMOS VLSI technology and dedicated to 1 Gbps point-to-point networks, are detailed. This open-loop CDR topology is compared with classical ones (high-Q filter, phase-locking, ...) in term of power consumption, silicon area and complexity. Our circuits exhibit some major advantages versus traditional CDRs: no external component needed, low consumption and low locking time. It is a very simple way to achieve clock extraction and data regeneration for high-speed data link applications.

Keywords

CMOS digital integrated circuits; VLSI; data communication equipment; decision circuits; high-speed integrated circuits; injection locked oscillators; low-power electronics; receivers; synchronisation; CMOS VLSI technology; circuit complexity; clock extraction; data regeneration; high-speed data link applications; injection-locked oscillator; integrated clock/data recovery architecture; low locking time; open-loop CDR topology; open-loop clock/data recovery architecture; point-to-point networks; power consumption; silicon area; CMOS technology; Circuit topology; Clocks; Energy consumption; Filters; Injection-locked oscillators; Integrated circuit technology; Network topology; Silicon; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE

ISSN

1529-2517

Print_ISBN

0-7803-7694-3

Type

conf

DOI

10.1109/RFIC.2003.1213951

Filename

1213951