Experiments in sub-micron CMOS technology: the JISI project

Author

Sicard, E. ; Huang, J. ; Fourniols, J.Y. ; Ferreira, A. ; Noullet, J.L.

Author_Institution

Dept. of Electr. Eng., Inst. Nat. des Sci. Appliquees, Toulouse, France

fYear

1995

Firstpage

334

Lastpage

336

Abstract

This paper describes a set of micro-electronics experiments implemented in a 0.7 μm CMOS integrated circuit used for the training of graduate students. A set of 10 experiments are implemented on the chip and include basic devices such as MOS transistors, diodes, and silicon sensors, as well as design oriented experiments (complex gates, latches) and analog experiments (operational amplifiers, crosstalk sensors, voltage controlled oscillators). The chip, named JISI has been fabricated in various CMOS technologies for performance evaluation with the technology scaling down

Keywords

CMOS integrated circuits; VLSI; circuit analysis computing; digital simulation; electronic engineering education; integrated circuit technology; training; 0.7 micron; JISI project; complex gates; crosstalk sensors; design oriented experiments; graduate students; latches; operational amplifiers; performance evaluation; sub-micron CMOS technology; training; voltage controlled oscillators; CMOS integrated circuits; CMOS technology; Crosstalk; Diodes; Integrated circuit technology; Latches; MOSFETs; Operational amplifiers; Silicon; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 1995 4th International Conference on

Conference_Location

Beijing

Print_ISBN

0-7803-3062-5

Type

conf

DOI

10.1109/ICSICT.1995.500157

Filename

500157