DocumentCode
1674218
Title
A SiGe 10-Gb/s multi-pattern bit error rate tester
Author
Malasani, Rammohan ; Bourdé, Christian ; Gutierrez, Germán
Author_Institution
Centellax Inc, Carlsbad, CA, USA
fYear
2003
Firstpage
321
Lastpage
324
Abstract
In this paper we present a monolithic IC that is capable of generating and evaluating multiple pseudo random bit sequences (PRBS) from DC to 10 Gb/s. This IC could be used as a low cost substitute for more expensive bit error rate test (BERT) systems.
Keywords
BiCMOS digital integrated circuits; automatic test pattern generation; binary sequences; error statistics; high-speed integrated circuits; random sequences; telecommunication equipment testing; 10 Gbit/s; BERT; SiGe BiCMOS process; mark density generator; monolithic IC; multi-pattern bit error rate tester; multiple PRBS; pseudo random bit sequences; Bit error rate; Clocks; Delay; Detectors; Germanium silicon alloys; Latches; Monolithic integrated circuits; Silicon germanium; Switches; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE
ISSN
1529-2517
Print_ISBN
0-7803-7694-3
Type
conf
DOI
10.1109/RFIC.2003.1213953
Filename
1213953
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