Title :
A SiGe 10-Gb/s multi-pattern bit error rate tester
Author :
Malasani, Rammohan ; Bourdé, Christian ; Gutierrez, Germán
Author_Institution :
Centellax Inc, Carlsbad, CA, USA
Abstract :
In this paper we present a monolithic IC that is capable of generating and evaluating multiple pseudo random bit sequences (PRBS) from DC to 10 Gb/s. This IC could be used as a low cost substitute for more expensive bit error rate test (BERT) systems.
Keywords :
BiCMOS digital integrated circuits; automatic test pattern generation; binary sequences; error statistics; high-speed integrated circuits; random sequences; telecommunication equipment testing; 10 Gbit/s; BERT; SiGe BiCMOS process; mark density generator; monolithic IC; multi-pattern bit error rate tester; multiple PRBS; pseudo random bit sequences; Bit error rate; Clocks; Delay; Detectors; Germanium silicon alloys; Latches; Monolithic integrated circuits; Silicon germanium; Switches; Testing;
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE
Print_ISBN :
0-7803-7694-3
DOI :
10.1109/RFIC.2003.1213953
