DocumentCode
167444
Title
Comparison of Parallel Programming Models on Intel MIC Computer Cluster
Author
Chenggang Lai ; Zhijun Hao ; Miaoqing Huang ; Xuan Shi ; Haihang You
Author_Institution
Univ. of Arkansas, Fayetteville, AK, USA
fYear
2014
fDate
19-23 May 2014
Firstpage
925
Lastpage
932
Abstract
Coprocessors based on Intel Many Integrated Core (MIC) Architecture have been adopted in many high-performance computer clusters. Typical parallel programming models, such as MPI and OpenMP, are supported on MIC processors to achieve the parallelism. In this work, we conduct a detailed study on the performance and scalability of the MIC processors under different programming models using the Beacon computer cluster. Followings are our findings. (1) The native MPI programming model on the MIC processors is typically better than the offload programming model, which offloads the workload to MIC cores using OpenMP, on Beacon computer cluster. (2) On top of the native MPI programming model, multithreading inside each MPI process can further improve the performance for parallel applications on computer clusters with MIC coprocessors. (3) Given a fixed number of MPI processes, it is a good strategy to schedule these MPI processes to as few MIC processors as possible to reduce the cross-processor communication overhead. (4) The hybrid MPI programming model, in which data processing is distributed to both MIC cores and CPU cores, can outperform the native MPI programming model.
Keywords
application program interfaces; coprocessors; multi-threading; Beacon computer cluster; Intel MIC computer cluster; MIC coprocessors; MPI programming model; OpenMP; high-performance computer clusters; many integrated core architecture; multi-threading; parallel programming models; Computational modeling; Computers; Coprocessors; Interpolation; Microwave integrated circuits; Performance evaluation; Programming; Intel MIC processor; MPI; OpenMP; parallel programming model; performance evaluation;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel & Distributed Processing Symposium Workshops (IPDPSW), 2014 IEEE International
Conference_Location
Phoenix, AZ
Print_ISBN
978-1-4799-4117-9
Type
conf
DOI
10.1109/IPDPSW.2014.105
Filename
6969481
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