Nano-scale early-design-stage prediction for crosstalk-induced power

We present a nano-scale early-design-stage prediction methodology for crosstalk-induced power using our new interconnect density function, the IDF. Unlike previous methods that use layout information, in our method a high-level circuit description is enough to accurately predict the crosstalk-induced power and no layout information is needed. The credibility of our prediction has been verified using several standard benchmarks. The relative accuracy for our crosstalk-induced power prediction is 94 percent compared to the post layout simulation data and an increase in the circuit size increases our prediction accuracy. It is shown that the relative error for our crosstalk-induced power prediction remains systematic.