DocumentCode
1674899
Title
Design and implementation of DVB-S2 transport stream for onboard processing satellite
Author
Varsha, Rangwani ; Arora, Rajat ; Ram, T.V.S. ; Patel, Amit
Author_Institution
Chandubhai. S. Patel Inst. of Technol., CHARUSAT Univ., Gujarat, India
fYear
2015
Firstpage
1
Lastpage
6
Abstract
Digital Video Broadcasting (DVB-S2) is a digital television broadcast standard which is introduced as a successor for the DVB-S system. This standard is compatible with multiple input protocols (IP, MPEG-2, MPEG-4) which are either encapsulated in transport stream or generic stream. This encapsulation feature makes it possible to support voice, video as well as data known as the triple play. This protocol is also an open standard, which leads to interoperability among different service providers. This protocol is highly suitable for on-board processing satellite as different class of users can be serviced through a single system as well as low cost ground receiver are available. The design described here implements DVB-S2 frame structure for transport stream, single input with constant code rate of 1/2 and QPSK modulation, with a roll-off of 0.20. A Xilinx Virtex®-5 FPGA is used to implement this design as this FPGA is also available in radiation tolerant version.
Keywords
IP networks; data encapsulation; digital video broadcasting; direct broadcasting by satellite; field programmable gate arrays; open systems; quadrature phase shift keying; radio receivers; transport protocols; DVB-S system; DVB-S2 transport stream design; DVB-S2 transport stream implementation; IP protocol; MPEG-2 protocol; MPEG-4 protocol; QPSK modulation; Xilinx Virtex FPGA; digital television broadcast standard; digital video broadcasting; encapsulation feature; generic stream; interoperability; low cost ground receiver; multiple input protocols; onboard processing satellite; open standard; radiation tolerant version; Baseband; Digital video broadcasting; Encoding; Modulation; Physical layer; Protocols; Standards; ACM; DVB-S2; FPGA; MODCOD; RRC;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design and Test (VDAT), 2015 19th International Symposium on
Conference_Location
Ahmedabad
Print_ISBN
978-1-4799-1742-6
Type
conf
DOI
10.1109/ISVDAT.2015.7208128
Filename
7208128
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