Standby leakage current estimation model for multi threshold CMOS inverter circuit in deep submicron technology

Author

Sarkar, Hari ; Kundu, Sudakshina

Author_Institution

Dept. of Comput. Sci. & Eng., West Bengal Univ. of Technol., Kolkata, India

fYear

2015

Firstpage

1

Lastpage

6

Abstract

Multi Threshold CMOS (MTCMOS) circuit can be used to overcome the trade-off between speed and standby leakage current inherent in single threshold CMOS circuit. The simplest form is the dual threshold CMOS (DTCMOS), in which two threshold voltages are used in the same logic circuit. As a result, the standby power can be greatly reduced by this approach which is a key factor for battery operated devices. This paper proposed a model for analytical calculation of standby leakage current for MTCMOS Inverter circuit in 90nm technology. We have used BSIM device model which is a widely used industrial model for standby leakage current modelling of MTCMOS Inverter circuit.

Keywords

CMOS logic circuits; integrated circuit modelling; leakage currents; logic gates; low-power electronics; BSIM device model; DTCMOS; MTCMOS inverter circuit; deep submicron technology; dual threshold CMOS; industrial model; logic circuit; multithreshold CMOS inverter circuit; single threshold CMOS circuit; standby leakage current estimation model; standby power; threshold voltages; CMOS integrated circuits; Integrated circuit modeling; Inverters; Leakage currents; MOSFET; Threshold voltage; 90nm technology; CMOS inverter circuit; MTCMOS; low and high Vth; subthreshold leakage current;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design and Test (VDAT), 2015 19th International Symposium on

Conference_Location

Ahmedabad

Print_ISBN

978-1-4799-1742-6

Type

conf

DOI

10.1109/ISVDAT.2015.7208141

Filename

7208141