Title :
A general purpose processor oriented to fuzzy reasoning
Author :
Ascia, Giuseppe ; Catania, Vincenzo
Author_Institution :
Dipt. di Ingegneria Informatica e delle Telecomunicazioni, Catania Univ., Italy
fDate :
6/23/1905 12:00:00 AM
Abstract :
The paper presents the design of a RISC processor which is equipped with a set of fuzzy-oriented instructions, thus allowing a significant increase in performance. In addition, a hardware solution is defined that can eliminate the data and control hazards typical of pipelined processor for fuzzy applications
Keywords :
fuzzy logic; microprocessor chips; reduced instruction set computing; RISC processor design; fuzzy reasoning; fuzzy-oriented instructions; general purpose processor; pipelined processor; Computer architecture; Delay; Fuzzy logic; Fuzzy reasoning; Fuzzy sets; Fuzzy systems; Hardware; Hazards; Inference algorithms; Reduced instruction set computing;
Conference_Titel :
Fuzzy Systems, 2001. The 10th IEEE International Conference on
Conference_Location :
Melbourne, Vic.
Print_ISBN :
0-7803-7293-X
DOI :
10.1109/FUZZ.2001.1007321
