Straightforward transient & noise analysis for ΣΔ PLL-based synthesizers of multiple feedback and feedforward structures

This paper presents a noise analysis model, which allows basic phase noise calculations of a ΣΔ PLL fractional-N synthesizer. Calculation results on various ΣΔ orders of multiple architectures, feedback and feedforward, and on transient process, which provides quick visualization of the design methods used to minimize the required settling-time, will be presented.