Title :
Development of a solution for achieving known-good-die
Author_Institution :
AEHR Test Syst., Mountain View, CA
Abstract :
A major problem curtailing the growth of the multichip module market is the IC manufacturer´s inability to provide known-good-die. To address this, a cost-effective process to burn-in and test at the die level is in development
Keywords :
integrated circuit testing; multichip modules; ASIC; IC manufacturer; RAM; burn-in; contact resistance; cost-effective process; die level; die substrate alignment; interconnect substrate; known-good-die; Costs; Integrated circuit interconnections; Integrated circuit testing; Manufacturing; Packaging machines; Semiconductor device manufacture; Semiconductor device packaging; Sockets; Substrates; System testing;
Conference_Titel :
Test Conference, 1994. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2103-0
DOI :
10.1109/TEST.1994.527931
