RF circuit design in reliability

Author

Xiao, Enjun ; Yuan, J.S.

Author_Institution

Chip Design & Reliability Lab., Univ. of Central Florida, Orlando, FL, USA

fYear

2003

Firstpage

575

Lastpage

578

Abstract

A methodology for designing reliable RF circuits is proposed. A model to predict hot carrier and soft breakdown effects on CMOS device parameters in RF circuits is developed. Hot carrier and soft breakdown effects are evaluated experimentally with 0.16 μm CMOS technology. Device stress measurement and SpectreRF simulation are conducted to evaluate the impact of hot carrier and soft breakdown effects on RF circuits such as low noise amplifier and voltage-controlled oscillator performance. Two design techniques to build reliable RF circuits are proposed and verified.

Keywords

CMOS integrated circuits; hot carriers; integrated circuit design; integrated circuit reliability; radiofrequency integrated circuits; semiconductor device breakdown; 0.16 micron; CMOS technology; RF circuit design; SpectreRF simulation; hot carrier stress; low-noise amplifier; reliability; soft breakdown; voltage-controlled oscillator; CMOS technology; Circuit simulation; Circuit synthesis; Design methodology; Electric breakdown; Hot carriers; Predictive models; Radio frequency; Semiconductor device modeling; Stress measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE

ISSN

1529-2517

Print_ISBN

0-7803-7694-3

Type

conf

DOI

10.1109/RFIC.2003.1214012

Filename

1214012