High-performance three-dimensional on-chip inductors in SOI CMOS technology for monolithic RF circuit applications

Author

Kim, Jonghae ; Plouchart, Jean-Olivier ; Zamdmer, Noah ; Fong, Neric ; Lu, Liang-Hung ; Tan, Yue ; Jenkins, Keith A. ; Sherony, Melanie ; Groves, Robert ; Kumar, Mahender ; Ray, Asit

Author_Institution

IBM Semicond. Res. & Dev. Center, Hopewell Junction, NY, USA

fYear

2003

Firstpage

591

Lastpage

594

Abstract

This paper presents high-Q and high-inductance-density on-chip inductors fabricated on high-resistivity substrate (HRS) using a 0.12 μm SOI CMOS technology with 8 copper metal layers. A peak Q of 52 is obtained at 5 GHz for a 0.6 nH STP (Single-Turn, multiple metal levels in Parallel) inductor. An inductance density of 5302 fH/μm² is obtained for a 42 nH MTS (Multi-Turn, multiple metal layers in Series) inductor.

Keywords

CMOS integrated circuits; copper; equivalent circuits; radiofrequency integrated circuits; silicon-on-insulator; thin film inductors; 0.12 micron; 3D on-chip inductors; 5 GHz; Cu; Cu metal layers; MTS inductor; RFIC; SOI CMOS technology; STP inductor; Si; high-Q inductors; high-resistivity substrate; metal stacking scheme; monolithic RF circuit applications; multi-turn multiple metal layers in series; single-turn multiple metal levels in parallel; three-dimensional inductors; CMOS technology; Circuits; Conductivity; Copper; Geometry; Inductance; Inductors; Predictive models; Q measurement; Radio frequency;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE

ISSN

1529-2517

Print_ISBN

0-7803-7694-3

Type

conf

DOI

10.1109/RFIC.2003.1214016

Filename

1214016