DocumentCode
1675829
Title
Improved techniques for wiring layouts in the square grid
Author
Tollis, Ioannis G. ; Vaguine, Andre V.
Author_Institution
Dept. of Comput. Sci., Texas Univ., Richardson, TX, USA
fYear
1989
Firstpage
1875
Abstract
Improved techniques for obtaining wirings of layouts in the square grid are presented. Namely the authors show that the number of layouts that require four layers using the heuristics is often less than half the number without using the heuristics. They also show how to use the heuristics in order to obtain very efficient stretchings of layouts that can be wired using three layers
Keywords
VLSI; circuit layout CAD; four layers; square grid; stretchings of layouts; techniques for wiring layouts; three layers; Computer science; Heuristic algorithms; Routing; Very large scale integration; Wire; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location
Portland, OR
Type
conf
DOI
10.1109/ISCAS.1989.100734
Filename
100734
Link To Document