The performance comparison of CMOS vs biploar VCO in SiGe BiCMOS technology

Author

Wang, Xudong ; Xudong Wang

Author_Institution

Boston Design Center, TriQuint Semicond., Lowell, MA, USA

fYear

2003

Firstpage

615

Lastpage

618

Abstract

Two 2.3 GHz VCO monolithic ICs using CMOS and bipolar topology respectively for WCDMA transmitter application are designed and fabricated in IBM 0.25 μm SiGe BiCMOS technology. The design trade-offs of each design topology are discussed. The results indicated that the CMOS version has better phase noise, more power efficient, but more sensitive to temperature and process than that of the bipolar counter partner.

Keywords

BiCMOS analogue integrated circuits; CMOS analogue integrated circuits; Ge-Si alloys; Q-factor; UHF integrated circuits; UHF oscillators; bipolar analogue integrated circuits; integrated circuit design; integrated circuit noise; phase noise; semiconductor materials; voltage-controlled oscillators; 0.25 micron; 2.3 GHz; CMOS topology; IBM technology; SiGe; SiGe BiCMOS technology; VCO monolithic ICs; WCDMA transmitter application; bipolar topology; performance comparison; phase noise; BiCMOS integrated circuits; CMOS process; CMOS technology; Germanium silicon alloys; Multiaccess communication; Phase noise; Silicon germanium; Topology; Transmitters; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE

ISSN

1529-2517

Print_ISBN

0-7803-7694-3

Type

conf

DOI

10.1109/RFIC.2003.1214022

Filename

1214022