A 14mW 2.5MS/s 14bit Sigma-Delta Modulator Using Pseudo-Differential Split-Path Cascode Amplifiers

Author

Cao, Zhiheng ; Song, Tongyu ; Yan, Shouli

Author_Institution

Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX

fYear

2006

Firstpage

49

Lastpage

52

Abstract

Switched-capacitor biased pseudo-differential split-path cascode amplifiers are proposed to achieve high power efficiency and small die area for a 14-bit 2.5MS/s DeltaSigma modulator. Sufficient power supply rejection is maintained through the biasing circuit. A novel signal and reference sampling network eliminates input common-mode voltages and relaxes op-amp linearity requirements, making it possible to use short channel length transistors for speed and power efficiency. A prototype chip is fabricated in a 0.25mum CMOS technology with a core area of 0.27mm². Experimental results show that 84dB dynamic range is achieved with the 1.25MHz signal bandwidth when clocked at 120MHz. The power dissipation is 14mW at 2.5V including the on-chip voltage reference buffers

Keywords

CMOS integrated circuits; differential amplifiers; operational amplifiers; reference circuits; sigma-delta modulation; switched capacitor networks; 0.25 micron; 1.25 MHz; 120 MHz; 14 bit; 14 mW; 2.5 V; CMOS technology; on-chip voltage reference buffers; op-amp linearity requirements; operational amplifiers; pseudodifferential split-path cascode amplifiers; reference sampling network; short channel length transistors; sigma-delta modulator; switched-capacitor amplifiers; CMOS technology; Circuits; Delta modulation; Delta-sigma modulation; High power amplifiers; Linearity; Operational amplifiers; Power supplies; Sampling methods; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2006. CICC '06. IEEE

Conference_Location

San Jose, CA

Print_ISBN

1-4244-0075-9

Electronic_ISBN

1-4244-0076-7

Type

conf

DOI

10.1109/CICC.2006.320961

Filename

4114906