• DocumentCode
    167729
  • Title

    Utilizing micro-architecture parallelism to hide reclaiming operations for NAND multi-channel SSDs

  • Author

    Ronghui Wang ; Ou Yang ; Nong Xiao ; Minxuan Zhang

  • Author_Institution
    Coll. of Comput., Nat. Univ. of Defense Technol., Changsha, China
  • fYear
    2014
  • fDate
    8-9 May 2014
  • Firstpage
    832
  • Lastpage
    835
  • Abstract
    Due to the unique erase-before-write characteristic of flash memories, flash-based solid-state disks (SSDs) use out-of-place update and require a garbage collection process to recycle invalid data space. This process brings extra operations and latencies, causing I/O blocking and performance degradation, especially when the device is close to be full. In this work, we use a parallel-unit-aware allocation policy for the internal migrating write and incoming requesting write, scheduling and packing all the operations together to utilize the micro-architecture parallelism of multi-channel SSDs. Trace-driven simulations reveal that the proposed design reduces 33.31% of response time, on average, thus improves the device performance.
  • Keywords
    NAND circuits; disc drives; flash memories; performance evaluation; recycling; scheduling; I/O blocking; NAND multichannel SSD; erase-before-write characteristic; flash memories; flash-based solid-state disks; microarchitecture parallelism; parallel-unit-aware allocation policy; performance degradation; reclaiming operations; trace-driven simulations; Delays; FTL; SSDs; allocation; garbage collection; micro-architecture parallelism; scheduling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Computer and Applications, 2014 IEEE Workshop on
  • Conference_Location
    Ottawa, ON
  • Type

    conf

  • DOI
    10.1109/IWECA.2014.6845750
  • Filename
    6845750