Dynamic improvement in UPS by means of control delay minimization

This paper investigates the effects of control delay minimization in the dynamic performance of uninterruptible power supplies (UPS). Shifting the sampling time of inductor current and output voltage toward the duty-cycle update instant, voltage loop bandwidth can be significantly improved. A detailed model based on the modified Z-transform, which accounts for different time delays in multi-loop control, is proposed. The model accurately predicts the effectiveness of the proposed provisions and shows that even a small shift of output voltage sampling gives a significant dynamic improvement. Instead, less contribution comes from the delay minimization of the inductor current sampling, so that current ripple cancellation techniques are not needed. The proposed analysis is motivated by the increase of computational power of DSPs and microcontrollers, which are able to complete the multi-loop control of UPS output stage in a small fraction of the modulation period. The effectiveness of the proposed analysis is demonstrated by simulation and experimental results on a three-phase/three-phase 30 kVA UPS prototype. Using two control design based on the same phase margin, the output voltage THD with the normalized distorting load is reduced from 6.8 % to 5.7 % delaying the output voltage sampling of 25 μs.