DocumentCode :
1677998
Title :
1.56 GHz On-chip Resonant Clocking in 130nm CMOS
Author :
Hansson, Martin ; Mesgarzadeh, Behzad ; Alvandpour, Atila
Author_Institution :
Dept. of Electr. Eng., Linkoping Univ.
fYear :
2006
Firstpage :
241
Lastpage :
244
Abstract :
This paper describes a successful experiment of 1.56-GHz on-chip LC-tank resonant clock oscillator, which directly drives 2times896 flip-flops, without intermediate buffers. Detailed power measurements of a test-chip in 130-nm CMOS technology show that the proposed resonant clocking technique results in 57 % lower clock power and 15-30 % lower total chip power compared to the conventional clocking strategy implemented on the same chip. Furthermore, clock jitter measurements show a worst-case peak-to-peak jitter of 28.4 ps (or 14.5 ps using injection locking) across 0-to-80 % data activity in flip-flops and the data-path logic
Keywords :
CMOS integrated circuits; buffer circuits; clocks; flip-flops; jitter; oscillators; 1.56 GHz; 130 nm; 14.5 ps; 28.4 ps; CMOS technology; buffers; clock jitter measurements; clock power; data-path logic; flip-flops; injection locking; on-chip LC-tank resonant clock oscillator; on-chip resonant clocking; peak-to-peak jitter; power measurements; resonant clocking technique; test-chip; total chip power; CMOS technology; Clocks; Flip-flops; Injection-locked oscillators; Jitter; Logic; Power measurement; Resonance; Semiconductor device measurement; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2006. CICC '06. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
1-4244-0075-9
Electronic_ISBN :
1-4244-0076-7
Type :
conf
DOI :
10.1109/CICC.2006.320947
Filename :
4114949
Link To Document :
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