A CMOS Image Sensor with combined adaptive-quantization and QTD-based on-chip compression processor

Author

Shoushun, Chen ; Bermak, Amine ; Yan, Wang ; Martinez, Dominique

Author_Institution

Dept. of EEE, Hong Kong Univ. of Sci. & Technol.

fYear

2006

Firstpage

329

Lastpage

332

Abstract

In this paper, a CMOS image sensor with on-chip compression processor is proposed. An adaptive quantization scheme based on boundary adaptation procedure followed by an on-line quadrant tree decomposition processing is proposed enabling low power, robust and compact image compression processor. The image sensor chip has been implemented using 0.35 mu CMOS technology and operates at 3.3 V. Simulation and experimental results show compression figures corresponding to 0.6-0.8 BPP, while maintaining reasonable PSNR levels and very low operating power consumption

Keywords

CMOS image sensors; coprocessors; data compression; image coding; quadtrees; quantisation (signal); 0.35 micron; 3.3 V; CMOS image sensor; CMOS technology; adaptive quantization; boundary adaptation procedure; image compression processor; on-chip compression processor; online quadrant tree decomposition processing; CMOS image sensors; CMOS technology; Image coding; Image sensors; PSNR; Pixel; Quantization; Robustness; Sensor arrays; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2006. CICC '06. IEEE

Conference_Location

San Jose, CA

Print_ISBN

1-4244-0075-9

Electronic_ISBN

1-4244-0076-7

Type

conf

DOI

10.1109/CICC.2006.320903

Filename

4114971