Title :
Modeling for structured system interconnect test
Author :
Angelotti, Frank W.
Author_Institution :
Application Bus. Syst. Div., IBM Corp., Rochester, MN, USA
Abstract :
With the acceptance of test standards such as IEEE 1149.1, the potential for structured methods for system test is growing rapidly. In particular, interconnect testing based on standardized boundary scan structures will be an important component of a future structured system test methodology. A strategy based on building an interconnect topology model of the system under test and using that model to generate interconnect test patterns at test time provides for a level of system test coverage that is difficult or impossible to obtain from methods based on static stored test patterns. This paper discusses the problem of dynamically generating a model of system interconnect topology for use in structured interconnect test generation and analysis. A solution for the most general case is given and some simple system design for test rules that greatly simplify the process are proposed. Several additional solutions which explore some potential trade-offs are discussed. A practical algorithm that requires minimal storage and reasonable computation is proposed
Keywords :
IEEE standards; automatic testing; boundary scan testing; fault location; peripheral interfaces; IEEE 1149.1; dynamic generation; interconnect topology model; minimal storage; standardized boundary scan structures; structured system interconnect test; system test coverage; test standards; Backplanes; Built-in self-test; Control systems; Cost function; Power system interconnection; Registers; System testing; Test pattern generators; Topology;
Conference_Titel :
Test Conference, 1994. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2103-0
DOI :
10.1109/TEST.1994.527944