DocumentCode :
1679319
Title :
Evaluating conduction loss of a parallel IGBT-MOSFET combination
Author :
Kimball, Jonathan W. ; Chapman, Patrick L.
Author_Institution :
Grainger Center for Electr. Machinery & Electromechanics, Illinois Univ., Urbana, IL, USA
Volume :
2
fYear :
2004
Firstpage :
1233
Abstract :
A variety of power devices are available to designers, each with specific advantages and limitations. For inverters, typically an IGBT combined with a p-i-n diode is used to obtain high current density. Recent developments in high-voltage MOSFETs support other alternatives. For example, a MOSFET can be paralleled with an IGBT to reduce losses at low currents, while the IGBT carries the load at high currents. The current work evaluates conduction losses in this configuration, showing applicability to generic inverters.
Keywords :
MOSFET; insulated gate bipolar transistors; invertors; IGBT; MOSFET; conduction loss; inverters; p-i-n diode; power devices; Diodes; Electric variables measurement; FETs; Insulated gate bipolar transistors; MOSFET circuits; Machinery; Silicon; Temperature; USA Councils; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industry Applications Conference, 2004. 39th IAS Annual Meeting. Conference Record of the 2004 IEEE
ISSN :
0197-2618
Print_ISBN :
0-7803-8486-5
Type :
conf
DOI :
10.1109/IAS.2004.1348570
Filename :
1348570
Link To Document :
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