DocumentCode :
1679875
Title :
A Low-Power Unified Arithmetic Unit for Programmable Handheld 3-D Graphics Systems
Author :
Nam, Byeong-Gyu ; Kim, Hyejung ; Yoo, Hoi-Jun
Author_Institution :
Dept. of Electron. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon
fYear :
2006
Firstpage :
535
Lastpage :
538
Abstract :
A low-power, area-efficient 128-bit multifunction arithmetic unit has been developed for programmable shaders for handheld 3D graphics systems. It adopts the logarithmic number system (LNS) at the arithmetic core for the single cycle throughput and the small-size low-power unification of various complex arithmetic operations such as power, logarithm, trigonometric functions, vector multiplication, division, square root and inner product. An uneven 24-piecewise logarithmic conversion scheme is proposed with 0.8% of maximum conversion error. A 93K gate test chip is fabricated with 0.18-mum CMOS technology. It operates at 210MHz with 15.3mW power consumption at 1.8V
Keywords :
CMOS integrated circuits; computer graphics; fixed point arithmetic; low-power electronics; multiplying circuits; 0.18 micron; 1.8 V; 128 bit; 15.3 mW; 210 MHz; CMOS technology; arithmetic core; conversion error; handheld 3D graphics systems; logarithmic conversion; logarithmic number system; programmable shaders; unified arithmetic unit; vector multiplication; Arithmetic; CMOS technology; Circuits; Energy consumption; Graphics; Image converters; Interpolation; Piecewise linear approximation; Piecewise linear techniques; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2006. CICC '06. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
1-4244-0075-9
Electronic_ISBN :
1-4244-0076-7
Type :
conf
DOI :
10.1109/CICC.2006.320921
Filename :
4115017
Link To Document :
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