Compact outside-rail circuit structure by single-cascode two-transistor topology

This paper presents a new compact outside-rail circuit structure for future scaled CMOS technology. The proposed circuit is composed of only two transistors connected into a single cascode style for increasing supply voltage to one more nominal supply voltage (V_DD ). The circuit is manufactured and measured. Reliability is also verified by the trajectory plot for gate-source voltage and gate-drain voltage of all devices. The results confirm that triple of nominal supply voltage can be used without any overstress in all CMOS devices. The proposed circuit saves 52% area and improves speed for 40% of the conventional approach in the case of 4V_DD. An example of outside-rail opamp is also proposed by using the proposed circuit