Per-Pixel Floating-Point ADCs with Electronic Shutters for a High Dynamic Range, High Frame Rate Infrared Focal Plane Array

Author

Lee, Sang-Min ; Park, Hyunsik ; Wooley, Bruce A.

Author_Institution

Center for Integrated Syst., Stanford Univ., CA

fYear

2006

Firstpage

647

Lastpage

650

Abstract

A per-pixel floating-point, dual-slope A/D converter (ADC) array for a 16 times 16 long wavelength infrared detector array has been integrated in a 0.18-mum CMOS technology. To achieve a high dynamic range and high frame rate simultaneously, an electronic shutter is combined with an ADC for each pixel. A unique method of comparator offset cancellation, employing an integration capacitor with digital calibration, improves the uniformity of the array. The experimental prototype achieves a 19-bit dynamic range and 8-bit resolution at 3 kfps, with a power consumption of only 7 muW/pixel. Each per-pixel ADC occupies 4000 mum² and is well-suited to 3-dimensional integration

Keywords

CMOS image sensors; analogue-digital conversion; focal planes; 0.18 micron; 3-dimensional integration; 3D integration; CMOS technology; analog-digital converter; comparator offset cancellation; digital calibration; dual-slope ADC; electronic shutters; floating-point ADC; infrared detector array; infrared focal plane array; integration capacitor; CMOS technology; Capacitors; Clocks; Counting circuits; Dynamic range; Fault location; Infrared detectors; Sampling methods; Sensor arrays; Voltage; 3-D integration; A/D converter; dual-slope ADC; floating-point ADC; infrared focal plane array; per-pixel ADC;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2006. CICC '06. IEEE

Conference_Location

San Jose, CA

Print_ISBN

1-4244-0075-9

Electronic_ISBN

1-4244-0076-7

Type

conf

DOI

10.1109/CICC.2006.320864

Filename

4115041