Title :
Architecture experimentation with the behavioural silicon compiler SYCO
Author :
Jerraya, A.A. ; Courtois, B.
Author_Institution :
TIM3-IMAG/INPG, Grenoble, France
Abstract :
Architecture experimentation with the SYCO silicon compiler is described. It is noted that, although SYCO starts from a behavioral description, the translation scheme (from algorithmic description to layout) is easy to understand and there is a correspondence between the input description and the layout. The designer can easily modify the input description in order to force the compiler to produce a given result. SYCO provides a tool called ARTS that helps the user to make architectural tradeoffs. ARTS provides commands that modify automatically the input description in order to obtain a new architectural solution without modifying the function of the circuit. An example of architecture experimentation is given
Keywords :
circuit layout CAD; ARTS; algorithmic description; architectural tradeoffs; architecture experimentation; behavioural silicon compiler SYCO; circuit CAD; layout; translation scheme; Circuits; Logic; Microarchitecture; Process design; Silicon compiler; Subspace constraints;
Conference_Titel :
Electrotechnical Conference, 1989. Proceedings. 'Integrating Research, Industry and Education in Energy and Communication Engineering', MELECON '89., Mediterranean
Conference_Location :
Lisbon
DOI :
10.1109/MELCON.1989.50041