Title :
Fault injection in digital logic circuits at the VHDL level
Author :
Seward, S.R. ; Lala, P.K.
Author_Institution :
Comput. Sci. & Comput. Eng. Dept., Arkansas Univ., Fayetteville, AR, USA
Abstract :
This paper presents hardware-based techniques for transient and permanent fault injection in VHDL descriptors of both combinational and sequential digital circuits. The designer can choose the fault injection rate, which may vary from 100% (permanent fault) down to 0.01% (transient fault).
Keywords :
combinational circuits; digital circuits; fault simulation; hardware description languages; logic circuits; logic design; sequential circuits; VHDL code; VHDL descriptors; VHDL level; combinational digital circuits; digital logic circuits; digital system; fault injection rate; hardware-based techniques; permanent fault injection; sequential digital circuits; transient fault injection; Circuit faults; Computer science; Digital circuits; Digital systems; Energy consumption; High level languages; Logic circuits; Random sequences; Shift registers; Testing;
Conference_Titel :
On-Line Testing Symposium, 2003. IOLTS 2003. 9th IEEE
Print_ISBN :
0-7695-1968-7
DOI :
10.1109/OLT.2003.1214387
