Title :
Grand Challenge: The Future of CMOS System-on-Chip Hardware and Software Application Development
Author :
Von Herzen, B. ; Lerer, Mike
Author_Institution :
Rapid Prototypes Inc., Carson, NV
Abstract :
CMOS technology trends are forcing system designers to use multiple processors on a single die to meet power performance objectives. Power performance optimization also leads to heterogeneous combinations of processors, DSP units, ASSPs and FPGAs. Both of these trends exacerbate the crisis in software productivity. New tools, languages and implementation techniques must be utilized to ensure achievement of time-to-market objectives for today´s system-on-chip designs. Several examples are included to illustrate the problems, issues and opportunities as systems on chips drive towards hundreds of concurrent processes. These issues and their successful resolution are expected to cut across hardware and software boundaries and pervade the electronics industry as the drive for power performance continues over the coming decade
Keywords :
CMOS integrated circuits; circuit CAD; electronics industry; system-on-chip; CMOS system-on-chip hardware development; CMOS system-on-chip software application development; software productivity; system design; system-on-chip design; Application software; CMOS process; CMOS technology; Digital signal processing chips; Field programmable gate arrays; Hardware; Optimization; Productivity; Software systems; System-on-a-chip;
Conference_Titel :
Design, Applications, Integration and Software, 2006 IEEE Dallas/CAS Workshop on
Conference_Location :
Richardson, TX
Print_ISBN :
1-4244-0670-6
Electronic_ISBN :
1-4244-0670-6
DOI :
10.1109/DCAS.2006.321032
