Title :
Noise Analysis of Time-to-Digital Converter in All-Digital PLLs
Author :
Vamvakos, Socrates D. ; Staszewski, Robert Bogdan ; Sheba, Mahbuba ; Waheed, Khurram
Author_Institution :
Wireless Analog Technol. Center, Texas Instrum., Dallas, TX
Abstract :
In an all-digital PLL architecture the conventional phase-frequency detector is replaced in part by a time-to-digital converter. This paper presents an exact analysis of the mechanism by which reference clock jitter and/or supply/substrate noise are converted into TDC noise that is injected into the ADPLL loop. The cases of white and sinusoidal noise are considered and the analytical results are compared with simulations
Keywords :
analogue-digital conversion; digital phase locked loops; timing jitter; white noise; ADPLL loop; TDC noise; all-digital PLL architecture; noise analysis; phase-frequency detector; reference clock jitter; sinusoidal noise; substrate noise; supply noise; time-to-digital converter; white noise; 1f noise; Clocks; Delay; Inverters; Jitter; Oscillators; Phase frequency detector; Phase locked loops; Phase noise; White noise;
Conference_Titel :
Design, Applications, Integration and Software, 2006 IEEE Dallas/CAS Workshop on
Conference_Location :
Richardson, TX
Print_ISBN :
1-4244-0670-6
Electronic_ISBN :
1-4244-0670-6
DOI :
10.1109/DCAS.2006.321040
