Title :
Intermediate checkpointing with conflicting access prediction in transactional memory systems
Author :
Waliullah, M.M. ; Stenstrom, Per
Author_Institution :
Dept. of Comput. Sci. & Eng., Chalmers Univ. of Technol., Goteborg
Abstract :
Transactional memory systems promise to reduce the burden of exposing thread-level parallelism in programs by relieving programmers from analyzing complex inter-thread dependences in detail. By encapsulating large program code blocks and executing them as atomic blocks, dependence checking is deferred to run-time at which point one of many conflicting transactions will be committed whereas the others will have to roll-back and re-execute. In current proposals, a checkpoint is taken at the beginning of the atomic block and all execution can be wasted even if the conflicting access happens at the end of the atomic block In this paper, we propose a novel scheme that (1) predicts when the first conflicting access occurs and (2) inserts a checkpoint before it is executed. When the prediction is correct, the only execution discarded is the one that has to be re-done. When the prediction is incorrect, the whole transaction has to be re-executed just as before. Overall, we find that our scheme manages to maintain high prediction accuracy and leads to a quite significant reduction in the number of lost cycles due to roll-backs; the geometric mean speedup across five applications is 16%.
Keywords :
checkpointing; multi-threading; transaction processing; atomic blocks; conflicting access prediction; intermediate checkpointing; thread-level parallelism; transactional memory systems; Access protocols; Accuracy; Checkpointing; Computer science; Hardware; Parallel processing; Programming profession; Proposals; Runtime; Yarn;
Conference_Titel :
Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on
Conference_Location :
Miami, FL
Print_ISBN :
978-1-4244-1693-6
Electronic_ISBN :
1530-2075
DOI :
10.1109/IPDPS.2008.4536249