Title :
Energy efficiency optimization for digital applications in 28nm UTBB FDSOI technology
Author :
Amara, Amara ; Gupta, Navneet ; Shaik, Khaja Ahmad ; Anghel, Costin ; Itoh, Kiyoo
Author_Institution :
Institut Supérieur d´Electronique de Paris (ISEP) 10 Rue Vanves, Issy-les-Moulineaux, France
Abstract :
The goal of this research work is to explore technology and memory architectures to reduce power consumption with low area and high speed of operation. We proposed two different architectures of SRAM memory. First is focused on reducing dynamic power consumption and area, with high speed of operation. Second architecture is focused on reducing leakage power with good speed and optimized area.
Conference_Titel :
Mixed Design of Integrated Circuits & Systems (MIXDES), 2015 22nd International Conference
Conference_Location :
Torun, Poland
Print_ISBN :
978-8-3635-7806-0
DOI :
10.1109/MIXDES.2015.7208472
