Multilevel device models developed for the virtual test bed (VTB)

Model levels for power semiconductor devices are described in the context of the virtual test bed simulation environment. The five model levels proposed are universal in nature and can be adopted for categorization of device models in any circuit simulator or finite element (or finite difference) simulator. These levels begin with simple behavioral models, then move to physics-based models of various complexity. This work concentrates on the development and discussion of the model levels-1, -2, and -3. As an example, the case of an integrated gate-commutated thyristors (IGCT) is discussed in detail, and simulation and experimental results are provided and compared.