Title :
Built-in self-test (BIST) design of large-scale analog circuit networks
Author :
Wey, Chin-Long ; Jiang, Benlu ; Wierzba, Gregory M.
Author_Institution :
Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA
Abstract :
The decomposition approach has been successfully applied to fault diagnosis and fault prediction of large-scale analog circuit networks. However, as the number of accessories nodes required for locating faults at the desired level of decomposition increases, it is difficult to provide proportionally more I/O (input/output) connections. A built-in self-test (BIST) structure is presented to increase the number of accessible nodes and still keep a low pin overhead
Keywords :
analogue circuits; automatic testing; integrated circuit testing; linear integrated circuits; BIST; accessible nodes; built-in self-test; decomposition; fault diagnosis; fault prediction; large-scale analog circuit; low pin overhead; Analog circuits; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Fault diagnosis; Large-scale systems; Nails; Pins; Voltage;
Conference_Titel :
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location :
Portland, OR
DOI :
10.1109/ISCAS.1989.100776
