DocumentCode :
1685443
Title :
On channel segmentation design for row-based FPGAs
Author :
Zhu, K. ; Wong, D.F.
Author_Institution :
Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
fYear :
1992
Firstpage :
26
Lastpage :
29
Abstract :
The channel segmentation design problem for row-based field-programmable gate arrays (FPGAs) is to design a segmented channel to maximize the probability of successful routing. An algorithm which takes an arbitrary net distribution and an integer K (specifying the maximum number of segments allowed in routing a net) as inputs, and automatically generates a segmented channel which is most suitable for K-segment channel routing is presented. The algorithm was tested extensively over various net distributions. An algorithm for segmented channel routing based on reducing the problem to the maximum independent set problem for undirected graphs is also presented.<>
Keywords :
circuit layout CAD; graph theory; logic arrays; network routing; set theory; FPGAs; arbitrary net distribution; channel segmentation design; maximum independent set problem; routing; row-based field-programmable gate arrays; segmented channel; undirected graphs; Design automation; Graph theory; Logic arrays; Routing; Set theory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1992. ICCAD-92. Digest of Technical Papers., 1992 IEEE/ACM International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-3010-8
Type :
conf
DOI :
10.1109/ICCAD.1992.279403
Filename :
279403
Link To Document :
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