Title :
Reducing the run-time of MCMC programs by multithreading on SMP architectures
Author :
Byrd, Jonathan M R ; Jarvis, Stephen A. ; Bhalerao, Abhir H.
Author_Institution :
Dept. of Comput. Sci., Univ. of Warwick, Coventry
Abstract :
The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov chain Monte Carlo (MCMC) simulations are widely used for approximate counting problems, Bayesian inference and as a means for estimating very high-dimensional integrals. As such MCMC has found a wide variety of applications infields including computational biology and physics, financial econometrics, machine learning and image processing. This paper presents a new method for reducing the run-time of Markov chain Monte Carlo simulations by using SMP machines to speculatively perform iterations in parallel, reducing the runtime of MCMC programs whilst producing statistically identical results to conventional sequential implementations. We calculate the theoretical reduction in runtime that may be achieved using our technique under perfect conditions, and test and compare the method on a selection of multi-core and multi-processor architectures. Experiments are presented that show reductions in runtime of 35% using two cores and 55% using four cores.
Keywords :
Markov processes; Monte Carlo methods; mathematics computing; multi-threading; multiprocessing systems; Bayesian inference; Markov chain Monte Carlo programs; SMP architectures; multi-processor architectures; very high-dimensional integrals; Application software; Availability; Bayesian methods; Biological system modeling; Computational modeling; Computer architecture; Computer simulation; Monte Carlo methods; Multithreading; Runtime;
Conference_Titel :
Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on
Conference_Location :
Miami, FL
Print_ISBN :
978-1-4244-1693-6
Electronic_ISBN :
1530-2075
DOI :
10.1109/IPDPS.2008.4536354