DocumentCode :
1686089
Title :
Robust and efficient design plan for integrated differential negative-Gm LC VCOs
Author :
Raab, Bernhard ; Kaufmann, Manuel ; Rauchenecker, Andreas ; Ostermann, Timm
Author_Institution :
Inst. for Integrated Circuits, Johannes Kepler Univ., Linz, Austria
fYear :
2015
Firstpage :
386
Lastpage :
389
Abstract :
A practical way for the realisation of LC VCOs is presented. The design plan takes frequency and power constraints as input parameters, uses available inductor, varactor and transistor models for basic simulations and delivers a dimensioned circuit. Both, low phase noise and low power design fundamentals are respected, as well as NMOS-, PMOS- and CMOS transistor cores can be used. The design plan is verified with examples using two different processes. Simulation results of selected examples are provided at the end of this work.
Keywords :
CMOS integrated circuits; MOSFET; integrated circuit design; voltage-controlled oscillators; CMOS transistor cores; LC VCO; NMOS-transistor cores; PMOS-transistor cores; frequency constraints; inductor models; input parameters; low phase noise; low power design fundamentals; power constraints; transistor models; varactor models; Capacitance; Inductors; Q-factor; Tuning; Varactors; Voltage-controlled oscillators; Design-Plan; Negative-Gm; VCO;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Mixed Design of Integrated Circuits & Systems (MIXDES), 2015 22nd International Conference
Conference_Location :
Torun
Print_ISBN :
978-8-3635-7806-0
Type :
conf
DOI :
10.1109/MIXDES.2015.7208548
Filename :
7208548
Link To Document :
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