Robust and efficient design plan for integrated differential negative-Gm LC VCOs

A practical way for the realisation of LC VCOs is presented. The design plan takes frequency and power constraints as input parameters, uses available inductor, varactor and transistor models for basic simulations and delivers a dimensioned circuit. Both, low phase noise and low power design fundamentals are respected, as well as NMOS-, PMOS- and CMOS transistor cores can be used. The design plan is verified with examples using two different processes. Simulation results of selected examples are provided at the end of this work.