Title :
Practical test methods for verification of the EDRAM
Author_Institution :
United Memories Inc., USA
Abstract :
The Ramtron EDRAM is a 4 Mb dynamic RAM with 2 Kb static RAM cache. It is designed for 35 ns random access times, 15 ns cache cycle times with 5 ns pulse widths and includes logic functions not found on standard DRAM´s. The simple solution to testing the part is a 67 to 100 MHz machine, but a more creative solution requires the use of only slightly more creative techniques. The EDRAM, while having its own unique requirements for guaranteeing proper operation, is a part that can be fully tested an standard memory test equipment capable of 30 to 5 MHz operation with an algorithmic pattern generator
Keywords :
DRAM chips; SRAM chips; automatic testing; cache storage; fault diagnosis; 15 ns; 2 KB; 30 to 50 MHz; 35 ns; 4 Mbyte; 5 ns; 67 to 100 MHz; DRAM; EDRAM; Ramtron; algorithmic pattern generator; dynamic RAM; memory test equipment; static RAM cache; Cache storage; Clocks; DRAM chips; Libraries; Performance evaluation; Random access memory; Semiconductor device measurement; Test pattern generators; Testing; Time measurement;
Conference_Titel :
Test Conference, 1994. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2103-0
DOI :
10.1109/TEST.1994.527972
