Title :
The reliability of error correcting code implementations [IC reliability assessment]
Author :
Shooman, Martin L.
Author_Institution :
Polytechnic Univ., Brooklyn, NY, USA
Abstract :
This paper develops the probability of error expressions for parity bit codes and a single error correcting-single error detecting code, SECSED. A typical coding and decoding circuit involving standard ICs is developed for a parity bit code and a SECSED code. An expression was developed for the probability of undetected errors based on multiple bit errors or coder chip failure. Under certain conditions of bit transmission rate, B, and bit error probability, q, the simpler parity bit coding scheme is superior to the more complex Hamming code scheme. The general conclusion is that for more complex error detection schemes, one should evaluate the effects of generator and checker failures, since these may be of considerable importance for small values of q
Keywords :
Hamming codes; codecs; coding errors; error correction codes; error detection codes; failure analysis; integrated circuit modelling; integrated circuit reliability; probability; reliability theory; Hamming code scheme; SECSED; bit error probability; bit transmission rate; checker failures; coder chip failure; coding theory; complex error detection schemes; error correcting code implementations; error expressions probability; generator failures; multiple bit errors; parity bit codes; reliability; single error correcting-single error detecting code; undetected errors; Circuits; Code standards; Decoding; Error correction codes; Error probability; Galois fields; Law; Legal factors; Polynomials; Standards development;
Conference_Titel :
Reliability and Maintainability Symposium, 1996 Proceedings. International Symposium on Product Quality and Integrity., Annual
Conference_Location :
Las Vegas, NV
Print_ISBN :
0-7803-3112-5
DOI :
10.1109/RAMS.1996.500655