FPGA implementation of 3-D separable Gauss filter using pipeline rotation structures

The authors present an implementation technique of a novel system which can be used to perform 3-D filtering for separable kernels. The structure, consisting of Givens rotations and delay elements, is implemented in FPGA chip. Givens rotations are based on a pipeline CORDIC algorithm. Presented approach is tested against finite precision noise and sensitivity to structure parameters. It is shown that the elaborated structure outperforms a classical approach based on direct structures consisting of multipliers and delays.