Title :
Signal Integrity Impact of Ultra Low Power IO Initiatives
Author :
Das, Ripan ; Ji, Steven Yun ; Peterson, Steve ; Chen, Jian-Liang ; Pan, Christopher
Abstract :
I/O power represents a sizeable portion of the overall power budget on a low power mobile platform. Significant fraction of that I/O power is used to ensure signal integrity on the high speed buses. While there is flexibility to trade off I/O power consumption against signal quality on Intel´s current mobile and sub-note platforms, inefficiency still exists on wide I/O buses such as FSB and DDR2. In this paper, we will outline two novel bus termination schemes that can significantly reduce FSB and DDR2 I/O power consumption by further trading off signal quality on the new low power IA (LPIA) ultra small PC (UMPC) platforms
Keywords :
low-power electronics; microprocessor chips; system buses; DDR2; FSB; bus termination schemes; high speed buses; low power IA ultra small PC platforms; low power mobile platform; signal integrity; signal quality; ultra low power I/O; Batteries; Electronics packaging; Energy consumption; Power dissipation; Power transmission lines; Routing; Termination of employment; Timing; Turning; Voltage;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2006 IEEE
Conference_Location :
Scottsdale, AZ
Print_ISBN :
1-4244-0668-4
DOI :
10.1109/EPEP.2006.321177
