Title :
VLSI implementation of pulse density modulated neural network structure
Author :
Tomberg, Jouni ; Ritoniemi, Tapani ; Tenhunen, Hannu ; Kaski, Kimmo
Author_Institution :
Dept. of Electr. Eng., Tampere Univ. of Technol., Finland
Abstract :
An efficient implementation of a Hopfield-type, fully connected neural-network architecture is presented. It is based on a pulse-density-modulation technique implemented using switched-capacitor structures. The synaptic weights are programmable, and thus the area of one synapse and the entire network depends on the resolution of the weight. Advantages of the design are simple synapse structure and thus small area, expandability, and modularity
Keywords :
CMOS integrated circuits; VLSI; digital arithmetic; neural nets; parallel architectures; switched capacitor networks; CMOS IC; Hopfield-type; VLSI implementation; architecture; neural network structure; programmable weights; pulse density arithmetic; pulse-density-modulation; switched-capacitor structures; synaptic weights; Arithmetic; CMOS technology; Circuits; Computer networks; Hopfield neural networks; Neural networks; Neurons; Pattern recognition; Pulse modulation; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location :
Portland, OR
DOI :
10.1109/ISCAS.1989.100790
