Variability-Tolerant Binary Content Addressable Memory Cells

Within-chip variability has become a serious problem in modern nano-scale technologies, which is particular true for semiconductor memory designs. This paper proposes four-types of variability-tolerant (VT) binary content addressable memory (BCAM) cells. The VT-BCAM cells are designed by separating the read port from the write port such that the sizing for read static noise margin (SNM) and write trip voltage (WTV) is decoupled. By reusing the comparison logic of a BCAM cell as the read port, moreover, only an additional transistor and a read wordline are needed. Experimental results show that in comparison with the typical BCAM cell the proposed variability-tolerant BCAM cells can provide about 0.655V increment of read SNM by paying about 13% additional cell area.