A high performance hearing aid system with fully programmable ultra low power DSP

This paper presents the design of fully programmable digital signal processor for the hearing aid system and optimized implementation of digital hearing aid algorithms. The average performance of the developed processor is measured by performing Fast Fourier Transform (FFT) algorithm. The proposed applications such as variable multiband loudness compensation algorithm with wide dynamic range compression and sub-band based adaptive feedback cancellation algorithm are optimized for real-time processing by exploiting the data and instruction parallelism of the developed processor. The results show that the computational ability and power consumption of the developed processor are suitable to use for the hearing aid system. The optimization achieves that the computational time to perform the full applications on the processor takes only under 40% of the constraint for real-time processing.