Title :
Low-cost, Low-noise Vref Design for High-speed DDR Memory Modules
Author :
Uematsu, Yutaka ; Suzuki, Eiichi ; Osaka, Hideki ; Nishio, Yoji ; Hatano, Susumu
Author_Institution :
Central Res. Lab., Hitachi, Ltd., Kokubunji
Abstract :
This paper discusses new Vref designs for high-speed memory modules. Our designs include chip resistors in series with Vref traces that reduce the total noise. We confirmed reduced noise of half the original through experiments
Keywords :
integrated circuit design; integrated circuit noise; random-access storage; resistors; chip resistors; double data rate SDRAM; high-speed DDR memory modules; low-noise Vref design; Capacitors; Crosstalk; Impedance; Noise cancellation; Noise reduction; Proposals; Random access memory; Resistors; Variable structure systems; Voltage;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2006 IEEE
Conference_Location :
Scottsdale, AZ
Print_ISBN :
1-4244-0668-4
DOI :
10.1109/EPEP.2006.321241
