Title :
Study of Electrical Performance of Flip-Chip Package Via Designs for Gigahertz Applications
Author :
Shi, Hao ; Beyene, Wendemagegnehu T. ; Khalili, Sam ; Yuan, Chuck
Author_Institution :
Rambus Inc., Los Altos, CA
Abstract :
A test fixture for via electrical performance characterization is designed in an eight layer flip-chip package, which consists of two identical top-to-bottom via structures and a segment of trace on the bottom layer. The via structure is modeled by two commercial 3D full-wave electromagnetic (EM) simulators based on method of moment (MOM) and finite element method (FEM), respectively. The fixture models are correlated with vector network analyzer (VNA) measurement for up to 20 GHz. The electrical performance of three via design patterns is then compared using full-wave models. The impact of via design on high-speed signaling systems operating at the gigahertz frequencies is studied
Keywords :
finite element analysis; flip-chip devices; method of moments; network analysers; 3D full-wave electromagnetic simulators; finite element method; flip-chip package; gigahertz applications; method of moment; top-to-bottom via structures; vector network analyzer measurement; via design patterns; via electrical performance characterization; Communication system signaling; Electromagnetic measurements; Electromagnetic modeling; Finite element methods; Fixtures; Message-oriented middleware; Moment methods; Packaging; Signal design; Testing;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2006 IEEE
Conference_Location :
Scottsdale, AZ
Print_ISBN :
1-4244-0668-4
DOI :
10.1109/EPEP.2006.321150
