DocumentCode :
1689896
Title :
Parallelized Full Package Signal Integrity Analysis Using Spatially Distributed 3D Circuit Models
Author :
Krauter, Byron ; Beattie, Michael ; Widiger, David ; Huang, Hao-Ming ; Choi, Jinwoo ; Zhan, Yong
Author_Institution :
IBM Syst. & Technol. Group, IBM Corp., Austin, TX
fYear :
2006
Firstpage :
303
Lastpage :
306
Abstract :
Full package signal integrity analysis is parallelized in a suite of tools called PATS (package analysis tool suite). PATS extracts sparse circuit models using a segment-to-segment BEM (boundary element method) algorithm for both capacitance and inverse inductance and uses a fixed-time step circuit simulator to create time-domain scattering models. Critical issues regarding the parallelization of PATS and segment-to-segment BEM circuit models are explored. Examples demonstrating the accuracy of this approach are presented for real packaging cases
Keywords :
boundary-elements methods; circuit analysis computing; integrated circuit modelling; integrated circuit packaging; boundary element method; capacitance; fixed-time step circuit simulator; inverse inductance; package analysis tool suite; parallelized full package signal integrity analysis; spatially distributed 3D circuit models; time-domain scattering model; Analytical models; Capacitance; Circuit simulation; Conductors; Inductance; Integrated circuit interconnections; Packaging; Performance analysis; Signal analysis; Transmission line matrix methods;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 2006 IEEE
Conference_Location :
Scottsdale, AZ
Print_ISBN :
1-4244-0668-4
Type :
conf
DOI :
10.1109/EPEP.2006.321161
Filename :
4115415
Link To Document :
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