• DocumentCode
    1690103
  • Title

    Experimental reconfigurable radar video correlator

  • Author

    Peltonen, Jouni ; Eskelinen, Pekka ; Ruoskanen, Jukka ; Alm, Jarno

  • Author_Institution
    Defense Forces Tech. Res. Centre, Riihimaki, Finland
  • fYear
    2011
  • Firstpage
    447
  • Lastpage
    452
  • Abstract
    A reconfigurable FPGA-based radar video correlator having a selectable length from 8 to 32 pulse repetition intervals and freely settable detection criteria is described in this paper. The developed unit uses an Altera® Cyclone II FPGA Starter Development Board as its hardware and provides, besides the typical correlator function, an automatic tune-and-lock-in to the feeding radar´s pulse repetition frequency. A phase locked 250 MHz frequency is available for timing. A microcontroller circuit suitable for rapid laboratory tests and basic adjustments is also shown. This setup is able to generate both digital and simulated raw radar video having selectable recurrence probabilities to enable correlator threshold tuning.
  • Keywords
    field programmable gate arrays; microcontrollers; radar imaging; video signal processing; Altera Cyclone II FPGA Starter Development Board; automatic tune-and-lock-in; correlator function; correlator threshold tuning; detection criteria; frequency 250 MHz; microcontroller circuit; phase locked frequency; pulse repetition interval; reconfigurable FPGA-based radar video correlator; Clocks; Correlators; Generators; Microcontrollers; Phase locked loops; Radar; Software;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Radar Symposium (IRS), 2011 Proceedings International
  • Conference_Location
    Leipzig
  • Print_ISBN
    978-1-4577-0138-2
  • Type

    conf

  • Filename
    6042149