Profiling Patterns of Bit Flipping for Software Transactional Memories

Software Transactional Memory (STM) is a synchronization method proposed as an alternative to lockbased synchronization. It provides a higher-level abstraction that is easier to program, and that enables software composition. Transactions are defined by programmers, but the runtime system is responsible for detecting conflicts and avoiding race conditions. Phase Change Memory (PCM) is a new technology that is being developed to replace Dynamic Random Access Memories (DRAMs) in large datacenters. PCM write operations are much more expensive than reads in both energy and time. In this paper, we analyze performance, energy consumption, and write patterns in software transactional memories (STMs) to determine the potential of optimization for PCM scenarios. As the write operations are more expensive both in time and energy in PCMs, benchmarks from the STAMP suite were instrumented to count bits swapped due to store instructions, and experiments were executed using TinySTM. Our results showed a pattern of few bits being flipped for each memory write, and performance was inversely proportional to the number of writes. For most benchmarks, there was a small increase in energy consumption with more threads, which may be explained by the timid contention manager used by TinySTM.