DocumentCode
1691122
Title
Performance evaluation of MPLS and IP on an IXP1200 network processor
Author
Persaud, Rajendra ; Sabath, Dirk ; Berghoff, Gerald ; Schanko, Ralf
Author_Institution
Dept. of Comput. Sci., RWTH Aachen Univ., Germany
Volume
2
fYear
2006
Abstract
One of the most suitable protocols for traffic engineering is multi-protocol label switching (MPLS). On the one hand, a look-up in a switching table is certainly less complex and time-consuming than a corresponding routing table lookup in an IP router as long as no specialized hardware such as a Content Addressable Memory is deployed. On the other hand, MPLS introduces an additional shim header that increases packet transmission delay. The question this paper intends to answer is thus if the common statement that MPLS generally allows for faster packet forwarding than IP is true. Therefore, an extensive performance evaluation based on an implementation on standard network processors is performed. It is shown that packet forwarding is only faster with MPLS when the packet size remains below certain bound, i.e. it is demonstrated that the common statement that MPLS always allows for faster packet forwarding does not even hold on standard hardware.
Keywords
IP networks; delays; microprocessor chips; multiprotocol label switching; performance evaluation; routing protocols; table lookup; telecommunication traffic; transport protocols; IP network; IXP1200 network processor; MPLS; multiprotocol label switching; packet transmission delay; performance evaluation; routing table lookup; traffic engineering; Associative memory; Computer science; Delay; Hardware; Multiprotocol label switching; Protocols; Research and development; Routing; Table lookup; Telecommunication traffic;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Information Networking and Applications, 2006. AINA 2006. 20th International Conference on
ISSN
1550-445X
Print_ISBN
0-7695-2466-4
Type
conf
DOI
10.1109/AINA.2006.268
Filename
1620414
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